FROM THE EDITOR
This week we revisit digital signal processing on
FPGAs. A couple of weeks ago, we discussed tools and methodologies
for DSP implementation. This time, we take a look at the specialized
hardware that gives FPGAs their impressive performance advantage
over traditional processor-based DSP solutions. Beginning with
dedicated multipliers, and evolving into multiply-accumulate and
multi-function DSP blocks, the design of the DSP accelerator grows
steadily more sophisticated.
Thanks for reading! If
there's anything we can do to make our publications more useful to
you, please let us know at: comments@fpgajournal.com
Kevin
Morris – Editor FPGA and Programmable Logic
Journal |
LATEST NEWS
December 14, 2004
Synplicity
Increases Market Share in the FPGA Synthesis Market in 2003;
Synplicity Share of the FPGA Synthesis Market Greater than All
Competitors Combined
Six
New NI Embedded System Modules Offer Higher Accuracy, Speed and
Density
Wavesat
First in with WiMAX Chips, but ABI Research Says Giants Closing
Fast
December 13, 2004
Aldec
Releases Active-HDL Actel Edition
Hardi
Electronics Unveils Second Generation ASIC Prototyping
Platform
Altera's
First FPGA Lab in India Opens at the Indian Institute of Science
Actel
ProASIC Plus FPGAs Chosen By Monterey Bay Aquarium Research
Institute for Low-Power, High-Reliability Operation
FS2
Introduces Logic Navigator Trace and Debug Solutions for Atmel FPGAs
Celoxica
Introduces PixelStreams Platform for Streaming Video
Processing
IDT
Expands Industry-Leading Dual-Port and FIFO Product Families; New
Devices Represent Industry Firsts in Density, Performance and
Value-Added Features
Cypress
Ships WirelessUSB Sensor Network Development Kit
Celoxica
Upgrades ESL Design Portfolio
December 9, 2004
IEC
Seeking Proposals for DesignCon East Conference
Xilinx
Enables Instant Deployment of Aurora, Industry's Most Popular,
Scalable, Lightweight Serial Connectivity Protocol
December 8, 2004
Xilinx
Continues Focus on Wireless Market With Delivery of CPRI-Compliant
Reference Design
Altium
Adds Support for Latest Quartus II Release to Nexar
Jeda
Announces Spreadtrum Communications' Launch of 3G Standard Chipset
Using Jeda Technologies Verification Tool
Set | |
Mad
MACs Who’s Got the Best DSP
Accelerators?
Maybe you saw them in science fiction movies
when you were a kid. Possibly your Hot Wheels toy car collection contained
a few as well. You may have even drawn your own on your school book
covers. They looked like normal race cars, but a single engine just would
not do. Sometimes four, six, or eight huge power plants graced the
foredeck, each with eight big straight pipes sticking out the sides like
stocky legs on some steel-bodied spider, complete with a Roots blower
abdomen and air scoop head. You were never able to understand quite how
all those engines might work together to make the car go fast, but the
message of plenteous performance was clearly conveyed by the visual impact
of this plethora of pipes and plenums.
A few years later, you were in engineering school and the
magic spell was broken. You learned that the complexities of coordinating
so many motors for the task of moving a single vehicle caused too many
problems, and the promised performance of parallel power plants fell
forever into the chasm of misguided engineering fantasies.
Today, however, the process repeats itself. We all know
that the performance bottleneck for most digital signal processing (DSP)
algorithms is the multiply operation. The most recognized benchmark of DSP
performance is, in fact, a measurement of the number of multiplies and
accumulates per second such as MMACs (Million multiply accumulates per
second) and GMACs (Giga Multiply Accumulates per second). DSP processors
sometimes have several multiply accumulate (MAC) units attached to a high
performance processor that runs the overall algorithm and sequences the
expensive multiply operations out to the available MACs. [more]
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